English to Russian Tech/Engineering Telecom(munications) Системы передачи данных

[0019] Data may be clocked from a FIFO modules 214-1 to 214-N to a mapped egress queue, e.g., egress FIFO module 224, based on the clock rate of the reference LO 241.
The PPM detectors module 242 may include a PPM detector for each of the source / ingress ports 210-1 to 210-N to detect a PPM rate of the recovered clock for each of the source / ingress ports 210-1 to 210-N relative to the reference LO 241.
The gapped clock enable logic 244 monitors the FIFO fill levels of the egress FIFO module 224 and adjusts the write clock of the egress FIFO module 224 to skip a clock cycle as needed to match the data rate of the selected source / ingress port.
By way of example, consider a recovered clock equals 40Gps and the reference LO 241 is operating at a faster rate such as 10x the recovered clock.
In this example, l/l0th of the overall clocks cycles may be "skipped" to cause data to be output by a transmitter, e.g., 222, at a matching rate of 40Gbps.
In some cases, the gapped clock enable logic 244 outputs a signal, e.g., a skip signal, to cause one or more clock ticks to be skipped/ignored.

Для ознакомления с полным текстом документа см. WO2017/173277.

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